Rahul Blog

This is Rahul Kumar. I have completed my B.Tech from Guru Ghasidas university (Bilaspur) in ECE and now I am pursuing M.Tech on VLSI & Embedded System from SVNIT Surat.

Project work on Xilinx Vivado

Traffic light controller using Verilog

In this Traffic light Controller, clock and clear are two input signal and RED, GREEN & YELLOW are 2 bit output signal. Once the clear signal is active, design will enter into default state and start giving output after clear will go low. Please refer video explanation and code for your help.

Project work on Xilinx Vivado

Simple Vending Machine Using Verilog

Start from designing for a simple vending machine and go for make it advanced. Here I explained the verilog code for simple vending machine which gives us a medicine of Rs 10 and it won’t return a change. Comment if you are not able to build advance vending machine.

Electric Binary & LT Spice Collaboration

Lab on Analog VLSI Design

Since most of our works are from online this year so currently I am not familiar with some most useful software like cadence. Mentor graphics. I will soon make videos on that software once I learn this on internship.

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Design and Implementation of Modified Vedic Multiplier using Modified Decoder- based Adder

Coming Soon

Implementation of 4 bit ALU using behavioural modelling on Xilinx

Coming Soon

Obtain performance of serial and parallel adder with and without pipeline structure

Coming Soon

Completed on Xilinx Vivado

Verilog Projects

I have completed some of my verilog projects like Traffic light controller and Vending Machine and Adder using Xilinx Vivado. I am currently making their videos in an easy way to learn you better. Now my classes are on whiteboard with live. 

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